IGBT (SPICE model)
Block appearance in REPEAT VISION
The IGBT (SPICE model) block is a SPICE model of an IGBT transistor, which is built in accordance with . The block implements the following equivalent circuit :
Substitution scheme
The model is based on differential equations describing the equivalent circuit and the physical processes occurring in the transistor. The following equations are used in the model:
(1) \[\begin{split}VTemp=\frac{k \cdot T}{q},\\b=\frac{MUN}{MUP},\\ D_p=MUP \cdot VTemp,\\ Q_{bi}=AREA \cdot \sqrt{2 \cdot \epsilon_{si} \cdot q \cdot NB \cdot 0.6}\end{split}\]
(2) \[\begin{split}I_{MOS}= \begin{cases}GMIN \cdot V_{ds} , & \ V_{gs}<VT\\\frac{KF \cdot KP[(V_{gs}-VT)\cdot V_{ds}-\frac{KF \cdot V_{ds}^2}{2}]}{[1+THETA \cdot (V_{gs}-VT)]}+GMIN \cdot V_{ds}, & V_{ds \leq \frac{(V_{gs}-VT)}{KF}}\\\frac{KP \cdot(V_{gs}-VT)^2}{2\cdot[1+THETA \cdot(V_{gs}-VT)]}+GMIN \cdot V_{ds},&V_{ds}>\frac{(V_{gs}-VT)}{KF} \end{cases},\\ N_{scl}=N_B+N_{sat},\\ W_{dsj}= \sqrt{\frac{2 \cdot \epsilon_{si}\cdot (V_{ds}+0.6)}{q \cdot N_{scl}}},\\ C_{ds}=\frac{(AREA - AGD)\cdot \epsilon_{si}}{W_{dsj}},\\ W_{gdj}=\sqrt{\frac{2 \cdot \epsilon_{si} \cdot(V_{dg}+VTD)}{q \cdot N_{scl}}},\\ BV_{cbo}=BVF \cdot 5.34 \cdot 10^{13} \cdot N_{scl}^{-0.75},\\ M=\frac{1}{1-(\frac{V_{cb}}{BV_{cbo}})^{BVN}},\\ I_{gen}=\frac{q \cdot n_i \cdot AREA}{TAU} \cdot \sqrt{\frac{2 \cdot \epsilon_{si} \cdot V_{bc}}{q \cdot N_{scl}}},\\ C_{gdj}=\frac{AREA \cdot \epsilon_{si}}{W_{gdi}},\\ C_{gd} = \frac{C_{gdj}\cdot COXD}{C_{gdj} + COXD},\\ W_{bcj}=\sqrt{\frac{2 \cdot \epsilon_{si} \cdot (V_{bc}+0.6)}{q \cdot N_{scl}}},\\ C_{bcj}=\frac{AREA \cdot \epsilon_{si}}{W_{bcj}},\\ W=W_B - W_{bcj},\\ Q_B=q \cdot AREA \cdot W \cdot N_{scl},\\ C_{cer}=\frac{Q \cdot C_{bcj}}{3 \cdot Q_B},\\ I_{CSS}=\begin{cases}0 , & \ Q<0\\\frac{4 \cdot D_p \cdot Q}{W^2} \cdot (\frac{b}{1+b})-I_{COLL} \cdot (\frac{b}{1+b}), & Q\geq 0 \end{cases},\\ I_{mult}=(M-1) \cdot (I_{mos}+I_{css}+I_{qcer})+M \cdot I_{gen},\\ MUPc= \frac{1}{1/MUP +1/MUC},\\ MUNc= \frac{1}{1/MUN + 1/MUC},\\ D_c=\frac{2 \cdot VTemp \cdot MUPc \cdot MUNc}{MUPc + MUNc},\\ L=\sqrt{D_c \cdot TAU},\\ P_o=\frac{Q}{q \cdot AREA \cdot L \cdot tanh(\frac{W}{2 \cdot L})},\\ \delta_p=\frac{P_o \cdot sinh(\frac{W}{2 \cdot L})}{sinh(\frac{W}{L})},\\ \mu_{eff}=MUNc+\frac{MUPc \cdot Q}{Q+Q_B},\\ n_{eff}=\frac{\frac{W}{2 \cdot L}\cdot \sqrt{N_B^2 + P_o^2 \cdot csch^2(\frac{W}{L})}\cdot tanh(\frac{W}{2 \cdot L})}{arctanh[\frac{\sqrt{N_B^2 +P_o^2 \cdot csch^2(\frac{W}{L})\cdot tanh(\frac{W}{2\cdot L})}}{N_B +P_o \cdot csch(\frac{W}{L})\cdot tanh(\frac{W}{2 \cdot L})}]},\\ R_B= \begin{cases}\frac{W}{q\cdot MUNc \cdot AREA \cdot N_B} , & \ Q<0\\\frac{W}{q\cdot \mu_{eff} \cdot AREA \cdot n_{eff}}, & Q\geq 0 \end{cases},\\ I_{bss}=\begin{cases}0 , & \ Q<0\\\frac{Q}{TAU}+\frac{4 \cdot Q^2 \cdot N^2_{scl} \cdot Isne}{Q^2_B \cdot n_i^2}, & Q\geq 0 \end{cases},\\ V_{ebj}=0.6 - \frac{(Q-Q_{bi})^2}{2 \cdot q \cdot N_B \cdot \epsilon_{si} \cdot AREA^2},\\ V_{ebd}=VTemp \cdot ln[(\frac{P_o}{n_i^2})\cdot (N_B+P_o)]-\frac{D_c}{NUNc}\cdot ln(\frac{P_o+N_B}{N_B}),\\ V_{ebq} =\begin{cases}V_{ebj} , & \ Q<0\\min(V_{ebj}, V_{ebd}), & Q_{bi}>Q\geq 0\\V_{ebd},&Q\geq Q_{bi} \end{cases},\\ I_{qdg}=\frac{dV_{dg}}{dt} \cdot C_{gd},\\ I_{qds}=\frac{dV_{gs}}{dt} \cdot C_{gs},\\ I_{qds}=\frac{dV_{ds}}{dt} \cdot C_{ds},\\ I_{qcer}=\frac{dV_{ec}}{dt} \cdot C_{cer},\\ I_{qeb}=\frac{dQ}{dt}\end{split}\]
1. Properties
Property
Default Value
Description
Units of measurement
AGD – Gate-drain overlap area
0.000005
–
m\(^2\)
AREA – Device area
0.00001
–
m\(^2\)
BVF – Avalanche uniformity factor
1.0
–
–
BVN – Avalanche multiplication exponent
4.0
–
–
CGS – Gate-source capacitance per unit area
0.6e-9
–
F
COXD – Gate-drain oxide capacitance per unit area
33.0e-9
–
F
JSNE – Emitter saturation current density
6.0e-14
–
A/sm\(^2\)
KF – Triode region factor
1.0
–
–
KP – MOS transconductance
0.38
–
–
MUN – Electron mobility
1500
–
sm\(^2\) /V
MUP – Hole mobility
450
–
sm\(^2\) /V
NB – Base doping
2.0e14
–
sm\(^{-3}\)
TAU – Ambipolar recombination lifetime
1.0e-6
–
s
THETA – Transverse field factor
0.02
–
1/V
VT – Threshold voltage
5.0
–
V
VTD – Gate-drain overlap depletion threshold
0.0
–
V
WB – Metallurgical base width
0.000093
–
m
Vnsat – Electron saturation velocity
1.1e7
–
sm/s
Vpsat – Hole saturation velocity
0.95e7
–
sm/s
ALPHA1 – First temperature coefficient
1.428e20
–
–
ALPHA2 – Second temperature coefficient
4.54e11
–
–
Transistor temperature
27.0
–
°C
2. Inputs and outputs
Parameters
Input/Output
Description
Units of measurement
Port type
C
Input
Collector
-
Electronics
G
Input
Gate
-
Electronics
E
O
Emitter
-
Electronics
In order to see the connection capabilities of the block, you need to go to page Description of block ports