MOSFET n-type (SPICE model)#

The MOSFET n-type (SPICE model) block is a SPICE model of an n-type MOSFET that implements one version of the model (level 1). The block implements the following equivalent circuit :

Thermal stress is calculated using the formula (1):

(1)#\[VT = \frac{k \cdot T}{q}\]

where:

\(k\) – Boltzmann constant, \(k=1.38 \cdot 10^{-23}\) [J/K];

\(T\) - diode temperature, [K];

\(q\) is the elementary electric charge of an electron, \(q=1.602 \cdot 10^{-19}\) [C].

Below are the equations for the first-level MOSFET model of direct drain-source voltage polarity.

When calculating gate capacitances, the equations (2) are used:

(2)#\[\begin{split}Leff=L-2 \cdot DL\\COX=\frac{3.45 \cdot 10^{-14}}{TOX}\\Cox=COX \cdot W \cdot Leff \\ Ldiff=AD/W\\ PS=2 \cdot (W + Ldiff)\\PD=PS\\V_{th}=VTO+GAMMA \cdot (\sqrt{PHI-V_{BS}}-\sqrt{PHI})\end{split}\]

Shutter capacities are calculated using the formulas:

accumulation region (\(V_{gs}\) < \(V_{th}\) – \(PHI\)) (3):

(3)#\[\begin{split}C_{gb}=Cox+CGBO \cdot Leff\\C_{gs}=CGSO \cdot W\\C_{gd}=CGDO \cdot W\end{split}\]

depletion region (\(V_{on}\) – \(PHI\) < \(V_{gs}\) < \(V_{th}\)) (4):

(4)#\[\begin{split}C_{gb}=\frac{Cox \cdot (V_{th}-V_{gs})}{PHI}+CGBO \cdot Leff\\C_{gs}=\frac{2}{3} \cdot Cox \cdot (\frac{V_{th}-V_{gs}}{PHI}+1)+CGSO \cdot W\\C_{gd}=CGDO \cdot W\end{split}\]

saturation region (\(V_{th}\) < \(V_{gs}\) < \(V_{th}\)+\(V_{ds}\)) (5):`:

(5)#\[\begin{split}C_{gb}=CGBO \cdot Leff\\C_{gs}=\frac{2}{3}\cdot Cox + CGSO \cdot W\\ C_{gd}=CGDO \cdot W\end{split}\]

linear region (\(V_{gs}\) > \(V_{th}\)+\(V_{ds}\)) (6):

(6)#\[\begin{split}C_{gb}=CGBO \cdot Leff\\C_{gs}=Cox \cdot (1- \frac{V_{gs}-V_{ds}-V_{th}}{(2\cdot(V_{gs}-V_{th})-V_{ds})^2})+CGDO \cdot W\\C_{gd}=Cox \cdot (1- \frac{V_{gs}-V_{th}}{(2\cdot(V_{gs}-V_{th})-V_{ds})^2})+CGDO \cdot W\end{split}\]

When calculating the transition regions, the equations are used (7) :

(7)#\[\begin{split}G_{BS}=\frac{dI_{BS}}{dV_{BS}}\\G_{BD}=\frac{dI_{BD}}{dV_{BD}}\\F_{1.VBS} =\begin{cases}\frac{1}{(1-\frac{V_{BS}}{PB})^{MJ}} , & \ V_{BS} \leq FC \cdot PB\\\frac{1-FC \cdot (1 + MJ) + MJ \cdot (\frac{V_{BS}}{PB})}{(1 - FC)^{1+MJ}}, & \ V_{BS}> FC \cdot PB \end{cases}\\F_{2.VBS} =\begin{cases}\frac{1}{(1-\frac{V_{BS}}{PBSW})^{MJSW}} , & \ V_{BS} \leq FC \cdot PBSW\\\frac{1-FC \cdot (1 + MJSW) + MJSW \cdot (\frac{V_{BS}}{PBSW})}{(1 - FC)^{1+MJSW}}, & \ V_{BS}> FC \cdot PBSW \end{cases}\\F_{1.VBD} =\begin{cases}\frac{1}{(1-\frac{V_{BD}}{PB})^{MJ}} , & \ V_{BD} \leq FC \cdot PB\\\frac{1-FC \cdot (1 + MJ) + MJ \cdot (\frac{V_{BD}}{PB})}{(1 - FC)^{1+MJ}}, & \ V_{BD}> FC \cdot PB \end{cases}\\F_{2.VBD} =\begin{cases}\frac{1}{(1-\frac{V_{BD}}{PBSW})^{MJSW}} , & \ V_{BD} \leq FC \cdot PBSW\\\frac{1-FC \cdot (1 + MJSW) + MJSW \cdot (\frac{V_{BD}}{PBSW})}{(1 - FC)^{1+MJSW}}, & \ V_{BD}> FC \cdot PBSW \end{cases}\end{split}\]

Transition capacitances are calculated using the formulas:

with \(CBS\)=0 and \(CBD\)=0 (8):

(8)#\[\begin{split}C_{bs}=CJ \cdot AS \cdot F_{1.VBS} + CJSW \cdot PS \cdot F_{2.VBS} + TT \cdot G_{BS} \\ C_{bd}=CJ \cdot AS \cdot F_{1.VBD} + CJSW \cdot PD \cdot F_{2.VBD} +TT \cdot G_{BD}\end{split}\]

for \(CBS\)>0 and \(CBD\)>0 (9):

(9)#\[\begin{split}C_{bs}=CBS \cdot F_{1.VBS} + CJSW \cdot PS \cdot F_{2.VBS} + TT \cdot G_{BS} \\ C_{bd}=CBD \cdot F_{1.VBD} + CJSW \cdot PD \cdot F_{2.VBD} +TT \cdot G_{BD}\end{split}\]

When calculating the main current of a transistor, the equation is used (10):

(10)#\[K=\frac{KP \cdot W}{L - 2 \cdot LD}\]

The main current of the transistor is calculated using the formulas:

cutoff region {eq}ElectronicSpiceMosfetNMOS11`:

(11)#\[I_d=0\]

linear region (12):

(12)#\[I_d=K \cdot (V_{gs} - V_{th} - \frac{V_{ds}}{2}) \cdot V_{ds} \cdot (1 + LAMBDA \cdot V_{ds})\]

saturation region (13):

(13)#\[I_d=0.5 \cdot K \cdot (V_{gs} - V_{th})^2 \cdot (1 + LAMBDA \cdot V_{ds})\]

1. Properties#

Property	Default Value	Description	Units of measurement
L – channel length	1E-4	–	m
W – channel width	1E-4	–	m
AD - area of drain	0.0	–	m\(^2\)
AS – area of source	0.0	–	m\(^2\)
RDS – drain-source shunt resistance	1E6	–	Ohm
RD – drain ohmic resistance	0.0	–	Ohm
RS – source ohmic resistance	0.0	–	Ohm
RG – gate ohmic resistance	0.0	–	Ohm
RB – bulk ohmic resistance	0.0	–	Ohm
CGDO – gate-drain overlap cap.	0.0	–	F/m
CGSO – gate-source overlap cap.	0.0	–	F/m
CGBO – gate-bulk overlap cap.	0.0	–	F/m
CBD – bulk p-n zero-bias B-D cap.	0.0	–	F
CBS – bulk p-n zero-bias B-S cap.	0.0	–	F
CJ – bulk p-n zero-bias bot. cap.	0.0	–	F/m\(^2\)
CJSW – bulk p-n zero-bias s/w cap.	0.0	–	F/m
MJ – bulk p-n zero-bias bottom grad.	0.5	–	–
MJSW – bulk p-n zero-bias s/w coeff.	0.33	–	–
TT – bulk p-n transit time	0.0	–	s
IS – bulk p-n saturation current	1E-14	–	–
PB – bulk p-n bottom potential	0.8	–	V
PBSW – bulk p-n sidewall potential	0.8	–	V
FC – forward-bias depletion coeff.	0.5	–	–
LD – lateral diffusion length	0.0	–	m
KP – process transconductance	2E-5	–	A/V\(^2\)
VTO – zero-bias threshold voltage	0.0	–	V
GAMMA – body-effect coefficient	0.0	–	В\(^{0.5}\)
PHI – surface inversion potential	0.6	–	V
LAMBDA – channel-length modulation	0.0	–	V\(^-1\)
TOX – gate oxide thinkness	1E-7	–	m
T – transistor temperature	300	–	К

2. Inputs and outputs#

Parameters	Input/Output	Description	Units of measurement	Port type
Drain	Input	-	-	Electronics
Gate	Input	-	-	Electronics
Source	Output	-	-	Electronics
Bulk	Output	-	-	Electronics

In order to see the connection capabilities of the block, you need to go to page Description of block ports